1. Field of the Invention
The present invention relates to a semiconductor memory device using a one-time programmable device, and more particularly to a multi-time programmable semiconductor memory device, and a multi-time programming method therefor.
2. Description of the Related Art
Non-volatile storing devices may be divided into one-time programmable (referred to as OTP) type devices and multi-time programmable (referred to as MTP) type devices based on the allowable programming frequency. An OTP cell allows for only one programming on an electronic circuit and no additional programming is permissible. The OTP cell may be a fuse, an anti-fuse, an electrically programmable fuse (e-fuse), an erasable programmable read-only memory (EPROM), etc. It is impossible to erase the program stored in the OTP cell without using a separate device. In case of the EPROM, an erase operation may be performed using ultraviolet rays, but a physical auxiliary device is needed for the erase operation and the erase operation cannot be selectively performed at a bit unit level.
Therefore, when using an array of the OTP cells for storing data, additional programming operations are disabled so that once the OTP cell is programmed at either a wafer level or an end user level, updating data is impossible. Thus, when stored data needs to be updated, the use of the MTP cell is inevitable despite the advantages of OTP cells, such as lower cost, logic compatibility, etc.
The non-volatile MTP cells include a variety of types such as an electrically erasable programmable ROM (EEPROM), a ferroelectric random-access memory (FRAM), a magnetic RAM (MRAM), a phase-change RAM (PRAM), etc. However, despite the fact that multi-time programming may be feasible within the endurance limits of the MTP cell, the MTP cell has a complex structure and higher manufacturing costs due to an additional separate mask. Therefore, in some applications where a relatively low amount of data is to be stored, the MTP cells may result in the loss of competitive advantage in the marketplace for manufacturers and providers.
U.S. Pat. No. 5,966,339 assigned to International Business Machines Corp., discloses a multi-time programmable semiconductor memory device using a fuse cell. A unit includes a plurality of fuse cells to store a data bit, and an XOR operation is performed on states of the fuse cells for use in updating data.
According to U.S. Pat. No. 5,966,339, when the unit is programmed, the fuse cells included in the unit are sequentially programmed so that when an additional programming operation is performed on the fuse cell, the data in the unit is repeatedly updated.
FIG. 1 is a block diagram illustrating a conventional multi-stage reprogrammable fuse logic, which is described in the above U.S. Pat. No. 5,966,339.
Referring to FIG. 1, the conventional multi-stage reprogrammable fuse logic includes four fuses: FUSE A, FUSE B, FUSE C, and FUSE D respectively having inputs P1, P2, P3, and P4. The first two fuses, i.e., FUSE A and FUSE B, are connected to each other by way of an exclusive OR circuit. An output Y1 of the exclusive OR circuit is combined by the fuse FUSE C by way of an exclusive OR circuit. In a similar manner, the reprogrammable fuse in FIG. 1 may be repeatedly programmed.
However, according to U.S. Pat. No. 5,966,339, the following technical problems remain.
First, in order to update data stored in the unit, the stored data needs to be known to an external device. The data stored in the respective units are transmitted to an external device and compared with a new data that is to be written to the unit. Therefore, an additional device is needed to perform the above operation.
Secondly, when the data currently stored in the unit is to be updated, a fuse among a plurality of fuses in the unit, of which is to be programmed, cannot automatically be known. Therefore, over-programming, in which a fuse may be programmed over twice, or simultaneous programming, in which at least two fuses in the same unit are simultaneously programmed, may occur. Particularly, the electrically-programmed fuse is generally implemented using a polysilicon fuse, which is cut by allowing a strong current pulse to flow, exceeding a threshold value during a programming operation. Therefore, compared with a laser-blown fuse, there are few differences between the programmed state and a non-programmed state. In addition, the endurance of each state may be so poor that over-programming may occur.
Therefore, to program a desired fuse in the selected unit, the programming state of the respective fuses in the selected unit needs to be checked. Accordingly, there exists a need for a device that provides each programming state of the fuse in either serial or parallel to an external device. Employing such a device may require a plurality of pads or registers according to the number of fuses included in the unit, and is thus disadvantageous in view of chip area.
Third, in order to sequentially program one fuse at a time, a decoding circuit is needed to select a fuse among a plurality of fuses in the unit. The use of the decoding circuit may require an additional address pad, register, etc., and is thus disadvantageous in view of chip area.
Fourth, to disallow any additional programming when all the fuses in the unit are programmed, an external device needs to be notified of the programming state.
Fifth, when the unit is programmed and additional programming commands for writing different data is received by the unit, a device for preventing the additional programming, or for indicating to an external device the input of additional programming commands, is needed.